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Boards 3. AMD Virtex UltraScale+ FPGA VCU118 Evaluation Kit Click to Enlarge * × * AMD VIRTEX ULTRASCALE+ FPGA VCU118 EVALUATION KIT by: Xilinx, Inc The Virtex UltraScale+ FPGA VCU118 Evaluation Kit is the ideal development environment for evaluating the cutting edge Virtex UltraScale+ FPGAs. * Price: $9,066.00 * Part Number: EK-U1-VCU118-G * Lead Time: 8 weeks * Device Support: * Virtex UltraScale+ Buy or buy from: Authorized Distributors × AUTHORIZED DISTRIBUTORS Product: AMD Virtex UltraScale+ FPGA VCU118 Evaluation Kit Buy -------------------------------------------------------------------------------- Buy -------------------------------------------------------------------------------- Buy -------------------------------------------------------------------------------- Buy -------------------------------------------------------------------------------- Buy -------------------------------------------------------------------------------- Buy Toggle navigation ON THIS PAGE * Overview * Product Information * Resources OVERVIEW PRODUCT DESCRIPTION The Virtex™ UltraScale+™ FPGA VCU118 Evaluation Kit is the ideal development environment for evaluating the cutting edge Virtex UltraScale+ FPGAs. Virtex UltraScale+ devices provide the highest performance and integration capabilities in a FinFET node, including both the highest serial I/O and signal processing bandwidth, as well as the highest on-chip memory density. This kit is ideal for prototyping applications ranging from 1+ Tb/s networking and data center to fully integrated radar/early-warning systems. -------------------------------------------------------------------------------- KEY FEATURES & BENEFITS * Dual 80-bit DDR4 Component Memory * RLDRAM3 (2x36-bit) Memory * Dual QSFP28 Interfaces * PCIe Gen3 x16 (VCCINT = 0.85V) * VITA 57.4 FMC+ Interface * VITA 57.1 FMC Interface * Samtec FireFly Interface -------------------------------------------------------------------------------- FEATURED AMD DEVICES Featuring the VCU118 XCVU9P-L2FLGA2104E FPGA System Logic Cells (K) 2,586 DSP Slices 6,840 Memory (Mb) 345.9 GTY 32.75 Gb/s Transceivers 120 I/0 832 PRODUCT INFORMATION * Specifications * What's Inside Specifications BOARD FEATURES Featuring the Virtex™ UltraScale+™ XCVU9P-L2FLGA2104E FPGA Configuration * Onboard JTAG configuration circuitry to enable configuration over USB * JTAG header provided for use with AMD download cables such as the Platform Cable USB II * QSPI flash memory Communication & Networking * 10/100/1000 Mbps Ethernet (SGMII) * Dual 4x28Gbps QSFP28 cages * Samtec FireFly 4x28Gbps Interface * Dual USB-to-UART Bridge with mico-B USB connector * RJ45 Ethernet connector * PCI Express endpoint Gen3 x 16 Expansion Connectors * FMC+ HSPC connector (24 – 28Gbps GTY Transceivers, 80 differential user defined pairs) * FMC HPC1 connector (58 differential user defined pairs) * PMOD header * IIC Control & I/O * User Push Buttons (x5) * User DIP Switch (4-position) * PMBUS & System Controller MSP430 for power, clocks, SD-Card and I2C bus switching Memory * Two 4 GB DDR4 component memory interfaces (five [256 Mb x 16] devices each) * 4 MB RLD3 component memory interfaces (five [256 Mb x 16] devices each)IIC EEPROM: 8Kb * Micro Secure Digital (SD) connector 1Gb Quad SPI Flash Clocking * SI5335A Quad Clock Generator * Si570 IIC Programmable LVDS Clock Generator * SI5328C Clock Multiplier and Jitter Attenuator * 2x SMA MGT Reference Clock inputs * 1 SMA User Clock input Display * Users & Status LEDs Power * 12V wall adapter or ATX What's Inside WHAT'S INSIDE VCU118 EVALUATION BOARD Featuring the Virtex UltraScale+ XCVU9P-L2FLGA2104E FPGA × VIVADO™ DESIGN SUITE: DESIGN EDITION VOUCHER CODE Node locked & Device-locked to the XCVU9P FPGA, with 1 year of updates × SAMTEC FMC+ LOOPBACK CARDS × QSFP+ UNIVERSAL LOOPBACK ADAPTER × FMC, FMC+ AND PCIE LOOPBACK CARDS × ETHERNET CABLE × POWER CORDS AND ADAPTER × USB MICRO CABLE × ATX PCIE MINIFIT JR POWER ADAPTER × SAMTEC FIREFLY LOOPBACK CABLE × RESOURCES * Documentation * Tools & IP * Training & Support Documentation FILTER DOCUMENTATION STEP 1: BOARD REVISION * Rev 2.0 * Rev 1.1 * Rev 1.0 STEP 2: TOOLS VERSION * Most Recent Documents * Vivado Design Suite 2019.1 * Vivado Design Suite 2018.3 * Vivado Design Suite 2018.2 * Vivado Design Suite 2018.1 * Vivado Design Suite 2017.4 * Vivado Design Suite 2017.3 STEP 3: SHOW DOCUMENTATION Click to update search results table Update Search Results Filter by: Filter by: Document Type Loading Clear Or/And Operator More * Toggle Example Designs8 Toggle * Toggle Board Files4 Toggle * Toggle User Guides2 Toggle Search Loading Clear Arrow Up Arrow Down Clear All Filters Results per page * 25 * 50 * 75 * 100 TitleArrow UpArrow Down DateArrow UpArrow Down Results 1-14 of 14 UG1224 - VCU118 Evaluation Board User Guide (UG1224) (v1.5) Mar 10, 2023 Document Type: User Guides Describes in detail the features of the VCU118 evaluation board. Use this guide for developing and evaluating designs targeting a Virtex™; UltraScale+ FPGA (XCVU9P-L2FLGA2104). XTP251 - XTP251 - CE Declarations of Conformity (v8.0) Nov 30, 2022 Document Type: Board Files XTP423 - VCU118 CE Declaration of Conformity (v1.0) Feb 23, 2017 Document Type: Board Files CE Declaration of Conformity XTP439 - VCU118 Board Interface Test (v9.1) Jul 19, 2019 Document Type: Example Designs Running the VCU118 Board Interface Test (BIT) See All Versions Design File(s): * rdf0387-vcu118-bit-c-2019-1.zip XTP440 - VCU118 GT IBERT Tutorial (v9.0) May 30, 2019 Document Type: Example Designs Creating and Using GT IBERT Designs for the VCU118 board See All Versions Design File(s): * rdf0388-vcu118-gt-ibert-c-2019-1.zip XTP441 - VCU118 IPI Tutorial (v9.1) Jul 08, 2021 Document Type: Example Designs Run, compile, and program the IPI Application for the VCU118 See All Versions Design File(s): * rdf0389-vcu118-ipi-c-2019-1.zip XTP442 - VCU118 MIG Tutorial (v9.0) May 30, 2019 Document Type: Example Designs Using MIG to create DDR4 and RLDRAM3 memory designs for the VCU118 See All Versions Design File(s): * rdf0390-vcu118-mig-c-2019-1.zip XTP444 - VCU118 PCIe Tutorial (v9.0) May 30, 2019 Document Type: Example Designs Test and Create PCIe x16 Gen3 Design for the VCU118 See All Versions Design File(s): * rdf0392-vcu118-pcie-c-2019-1.zip XTP445 - VCU118 Restoring Flash Tutorial (v9.0) May 30, 2019 Document Type: Example Designs Restore the Flash Memory of the VCU118 to factory defaults See All Versions Design File(s): * rdf0393-vcu118-restoring-flash-c-2019-1.zip XTP447 - VCU118 System Controller Tutorial (v9.0) May 29, 2019 Document Type: Example Designs Using the System Controller for the VCU118 See All Versions Design File(s): * rdf0396-vcu118-system-controller-c-2019-1.zip XTP449 - VCU118 Software Install and Board Setup Tutorial (v9.0) May 29, 2019 Document Type: Example Designs Installing Xilinx software, UART drivers, and Board Setup for the VCU118 See All Versions XTP450 - VCU118 Schematics (v2.0) Dec 12, 2017 Document Type: Board Files See All Versions Associated File(s): * vcu118-schematic-source-rdf0398.zip * vcu118-bom-rdf0399.zip * vcu118-xdc-rdf0400.zip XTP451 - VCU118 Allegro Board (v2.0) Dec 11, 2017 Document Type: Board Files See All Versions Associated File(s): * vcu118-allegro-board-source-rdf0401.zip * vcu118-gerber-files-rdf0402.zip XTP453 - VCU118 Evaluation Kit Quick Start Guide (v1.2) Jun 27, 2018 Document Type: User Guides Provides a VCU118 evaluation kit overview and step-by-step instructions to set up and configure the board, run the built-in self-test (BIST), install the Xilinx tools, and redeem the license voucher. The voucher code appears on the printed Quick Start Guide inside the kit. See All Versions Results 1-14 of 14 Tools & IP DESIGN Name Description License Type Vivado Design Suite: Design Edition Voucher Code The AMD Vivado™ Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. Node locked & Device-locked to the XCVU9P FPGA, with 1 year of updates INTELLECTUAL PROPERTY Name Description License Type Memory Interface Generator (MIG) MIG is a free software tool used to generate memory controllers and interfaces for AMD FPGAs No-Charge IP Training & Support TRAINING * Training Resources * Design Hub * Vivado Design Suite Training Course * UltraScale Architecture Training Course SUPPORT * Solution Center * Community Forums * Partner Design Services -------------------------------------------------------------------------------- FEATURED ACCESSORIES SmartLynq Data Cable Platform Cable USB II FMC Loopback Card -------------------------------------------------------------------------------- SIMILAR PRODUCTS Virtex UltraScale+ HBM VCU128 FPGA Evaluation Kit Virtex UltraScale+ 56G PAM4 VCU129 FPGA Evaluation Kit Subscribe to the latest news from AMD * Facebook * Twitter * Instagram * Linkedin * Subscriptions * Youtube * Twitch COMPANY * About AMD * Management Team * Corporate Responsibility * Careers * Contact Us NEWS & EVENTS * Newsroom * Events * Blogs * Media Library COMMUNITY * Support * Developer * Red Team PARTNERS * AMD Partner Hub * Partner Resource Library * Authorized Distributors INVESTORS * Investor Relations * Financial Information * Board of Directors * Governance Documents * SEC Filings * Terms and Conditions * Privacy * Trademarks * Statement on Forced Labor * Fair & Open Competition * UK Tax Strategy * Cookies Policy * Cookies Settings © 2023 Advanced Micro Devices, Inc Feedback Close * This site uses cookies from us and our partners to make your browsing experience more efficient, relevant, convenient and personal. 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